1. Field of the Invention
The present invention relates to a flat panel display, and more particularly, to a flat panel display that prevents the voltage drop of a driving power and minimizes a reduction of characteristics of electronic devices included in a circuit region where various circuit devices are mounted.
2. Description of the Related Art
A lot of research into manufacturing super slim and flexible flat panel displays, such as Organic Light Emitting Displays (OLEDs) or Thin Film Transistor-Liquid Crystal Displays (TFT-LCDs) in connection with driving characteristics thereof has been conducted.
An Active Matrix (AM) flat panel display includes a pixel circuit in each pixel, and the pixel circuit controls and drives a light emitting device of the pixel according to a signal supplied from a scan line or a data line.
The driving power supplied to each pixel circuit is supplied to pixels by lines. The voltage of the power supplied to each of the pixels is not uniform due to a voltage drop in Vdd lines. As a result, non-uniform brightness can occur resulting in the degradation of the image quality.
Also, in the case of the AM OLED, at least one capacitor is included in each of the pixels, and a voltage drop can occur in the capacitor due to the multiple pixels. This problem is increased when the screen is large and when there are more capacitors.
To address this problem, a technique of forming an additional power supply layer has been developed by the present inventor.
U.S. Published Patent Application No. 2003/0111954A relates to an organic electroluminescent display having a top emitting structure in which an additional power supply layer supplies power to a substrate. However, in this case, the operation of electronic devices of a scan driver, a data driver, or particularly a Complementary Metal Oxide Semiconductor (CMOS) Thin Film Transistor (TFT) can be interrupted by the power supply layer.